Doctoral thesis

Compiler analysis for hardware/software co-design and optimization : an automation framework towards more efficient Heterogeneous Computing


99 p

Thèse de doctorat: Università della Svizzera italiana, 2020

English Performance increase, in terms of faster execution and energy efficiency, is a never-ending research domain and does not come for free. The breakdown of Dennard scaling, along with the seemingly inevitable end of Moore’s law economic aspect, present a new challenge to computer architects striving to achieve better performance in modern computer systems. Heterogeneous computing emerges as one of the solutions to overcome these limitations and keep the performance trend rising. Heterogeneous platforms employ specialized hardware (HW) that can accelerate the execution of a software (SW) application, or a part of that application. However, the design of efficient HW/SW computer architectures is a challenging problem, as it entails integration of a general purpose CPU with a number of specialized HW accelerators. The choice of which parts of an application to be accelerated as well as the optimizations to be applied to the HW accelerated parts, while taking into account the underlying memory system and the platform characteristics that the HW accelerators are implemented onto, are all non-trivial research questions and depend heavily on the characteristics of the SW applications that are going to be accelerated. Therefore, an in-depth SW analysis can be crucial, prior to designing a heterogeneous system, as it can provide valuable information and subsequently highly benefit performance. My research has focused on building automation frameworks that can aid HW engineers in the early stages of the design process. I have extended the capabilities of compiler infrastructures, while addressing these research questions, so that better decisions are made and, in turn, faster execution and improved energy efficiency is achieved. The frameworks I developed are, hence, valuable automation aids for the HW/SW partitioning and optimization phases, driving the designs of effective heterogeneous platforms one step forward.
  • English
Computer science and technology
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